Arc Skills / Interfaces
Review interface timing and latency budgets
An interface timing review asks whether the current path meets an existing deadline. Arc Skills takes stage bounds and mode evidence and returns the end-to-end calculation with unresolved paths visible.
Use this skill
Use Arc Skills to review my existing Interface path against its response deadline.
Inputs:
- Trigger event, observable endpoint, deadline and applicable modes
- Every stage duration with source, bound type and serial or overlapping rule
- Clock uncertainty, queuing, retries and degraded-path evidence
Return the stage table, compatible end-to-end aggregation, signed deadline headroom and open paths. Do not sum unlike percentiles or call a typical value a worst-case bound.What you provide and what you get
| What you have | How it is used | What you get |
|---|---|---|
| Deadline and endpoints | Defines exactly what is timed | Comparable event-to-response constraint |
| Stage bounds and sources | Provides durations with bound types | Summed serial path or open term |
| Modes, clocks and retry rules | Qualifies whether stages can be combined | Provisional or supported status |
Nominal path fits by 5 ms; retry path is open
Illustrative engineering example.
Assume the three fictional stage values are upper bounds under the same normal operating mode and serialize on the path. A bus-error retry is allowed, but its additional delay is unspecified. This illustrative path assumes acquisition/scheduling are included in the three quoted bounds; their coverage must be confirmed against the source definitions. No separate clock-offset allowance is supplied.
Sensor event → conversion ≤8 ms → bus delivery ≤5 ms → controller work ≤12 ms → done
Deadline: ≤30 ms from event to controller completion
Retry delay: TBD| Stage / condition | Bound type | Duration | Cumulative bound |
|---|---|---|---|
| Sensor conversion | Upper bound, normal mode | ≤8 ms | ≤8 ms |
| Bus delivery | Upper bound, normal mode | ≤5 ms | ≤13 ms |
| Controller work | Upper bound, normal mode | ≤12 ms | ≤25 ms |
| Deadline comparison | ≤30 ms required | 30 − 25 = 5 ms | At least 5 ms headroom on covered path; provisional |
| Bus-error retry | Additional bound missing | TBD | Fault path unresolved |
The serialized normal-path sum is at most 8 + 5 + 12 = 25 ms, leaving at least 5 ms relative to the illustrative 30 ms deadline if the bounds hold. This result is conditional on matched modes, compatible upper-bound definitions and no omitted acquisition, queue or timestamp uncertainty. It is not a measured response-time guarantee.
If the deadline also applies under bus errors, a retry longer than 5 ms would consume the provisional headroom. Obtain the retry bound and clock uncertainty before asserting compliance for that mode. This differs from allocating targets: the table reviews provided stage evidence against an existing deadline.
Review timing on one basis
- Define the triggering event, observable endpoint and deadline direction.
- List all serial, overlapping and queued segments with source and bound type.
- Combine only compatible bounds under the same mode and clock basis.
- Compare with the deadline, then test retry and degraded paths that the requirement covers.
Questions about this task
May I add three 99th-percentile times?
Not to claim a 99th-percentile end-to-end bound without a justified joint model. The example uses compatible upper bounds.
Why is the 5 ms margin provisional?
The retry delay, possible omitted queues and cross-clock uncertainty are not bounded for all applicable conditions.
Sources and further reading
- NASA Systems Engineering Handbook: product realization: Interface definition, integration sequence and verification context.
- NASA Systems Engineering Handbook: appendix: Terminology for budgets, margin and technical resources.